发明名称 TESTPIECE MOUNTING STAGE
摘要 <P>PROBLEM TO BE SOLVED: To provide a testpiece mounting stage used in a process for treating the testpiece of a silicon wafer or the like upon manufacturing a semiconductor or the like substantially at room temperature, which is sufficiently low in the thermal expansion coefficient and reduced in the generation of particles during treating in the process. <P>SOLUTION: Particle generation is suppressed by manufacturing the testpiece mounting stage employing a ceramics constituted of more than one kind of materials selected from lithium aluminosilicate and cordierite and more than one kind of materials selected from silicon carbide. silicon nitride, sialon, alumina, zirconia, mullite, zircon, aluminum nitride and calcium silicate while having a thermal expansion coefficient of -1&times;10<SP>-6</SP>-1&times;10<SP>-6</SP>/&deg;C at a temperature within the range of 23&plusmn;3&deg;C and specifying the surface roughness of a contact part between the ceramics and the testpiece so as to be not higher than 0.5&mu;m in Ra. <P>COPYRIGHT: (C)2004,JPO
申请公布号 JP2004140132(A) 申请公布日期 2004.05.13
申请号 JP20020302490 申请日期 2002.10.17
申请人 TAIHEIYO CEMENT CORP 发明人 ISHIDA HIRONORI;ISHII MAMORU;SHIOGAI TATSUYA
分类号 G03F7/20;C04B35/19;H01L21/027;H01L21/205;H01L21/3065;H01L21/68;H01L21/683;H02N13/00 主分类号 G03F7/20
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