发明名称 DIRECT MEMORY ACCESS DEVICE AND ITS CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To elongate a bus occupying time on the side of a host CPU by holding read access on the side of the host CPU during read access on the side of an external device and transferring downloaded data directly to the side of the host CPU. SOLUTION: When a DMA request signal DREQ is active and an empty flag FLG is active, DMA read access is performed and data read from an external device 13 is stored in a data buffer 21. Thereby, the data is firstly read from the external device 13 without waiting for a DMA enabling signal DACK from the host CPU 11, and then read request is performed on the host CPU 11 when the empty flag FLG is inactive, the data in the data buffer 21 is transferred to the side of the host CPU 11 in response to read from the host CPU 11, and the empty flag FLG is asserted. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004139361(A) 申请公布日期 2004.05.13
申请号 JP20020303674 申请日期 2002.10.18
申请人 SONY CORP 发明人 IMAIZUMI TAKASHI;FUJIMOTO SHIGEO
分类号 G06F13/16;G06F13/18;G06F13/28;G06F13/38;(IPC1-7):G06F13/28 主分类号 G06F13/16
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