| 摘要 |
PURPOSE: A semiconductor memory device having a step type vertical transistor and a manufacturing method thereof are provided to be capable of restraining the electric charges stored at a storage node from being leaked in reading operation. CONSTITUTION: A semiconductor memory device is provided with a planar transistor and a vertical transistor. At this time, the planar transistor includes the first and second conductive regions formed at the predetermined portions of a semiconductor substrate(102), a channel region between the first and second conductive regions, and a storage node(106) formed on the channel region. The vertical transistor includes the storage node, a multiple tunnel junction layer(116) deposited on the storage node, a data line formed on the multiple tunnel junction layer, both sidewalls of the storage node located across the data line, and a word line(142) for enclosing both sidewalls of the multiple tunnel junction layer. At this time, the upper stack portion of the vertical transistor has a smaller width than that of the lower stack portion of the same.
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