发明名称 |
CAPACITOR, WIRING BOARD, DECOUPLING CIRCUIT, AND HIGH-FREQUENCY CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide a capacitor which attains low ESL and a high capacity. SOLUTION: A capacitor 10 is configured such that: a first conductor layer 3 is disposed on one major surface of a dielectric layer 2 and a second conductor layer 4 is disposed on the other major surface of the dielectric layer 2; a first through conductor 5 separated from the second conductor layer 4 by a non-conductor formation region 13 and connected to the first conductor layer 3 and a second through conductor 6 separated from the first conductor layer 3 by a non-conductor formation region 14 and connected to the second conductor layer 4 are formed in the thickness direction of the dielectric layer 2; and the first conductor 5 and the second conductor 6 are exposed on the outermost surface of the dielectric layer 2. The first through conductor 5 and the second through conductor 6 are integrated to a lattice alternately and form a through conductor group G. COPYRIGHT: (C)2004,JPO
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申请公布号 |
JP2004140350(A) |
申请公布日期 |
2004.05.13 |
申请号 |
JP20030335811 |
申请日期 |
2003.09.26 |
申请人 |
KYOCERA CORP |
发明人 |
SATO HISASHI;TAKESHITA YOSHIHIRO |
分类号 |
H01G4/30;(IPC1-7):H01G4/30 |
主分类号 |
H01G4/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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