发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT TESTING DEVICE AND TEST METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit testing device and a test method enabling an operator to easily grasp the test state of each lot even if a semiconductor integrated circuit of a different lot is arranged in a furnace of a thermostat used when performing a burn-in test, capable of shortening furthermore a time required for the test, and hereby capable of reducing a manufacturing cost of the semiconductor integrated circuit. SOLUTION: A plurality of racks are provided in the furnace 12, and a DUT included in the same lot is arranged on one rack but a DUT included in a different lot can be arranged on a different rack. The arrangement state and the test state of a lot in the furnace 12 are displayed relative to each rack on a display part 23. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004138527(A) 申请公布日期 2004.05.13
申请号 JP20020304088 申请日期 2002.10.18
申请人 ANDO ELECTRIC CO LTD 发明人 KURIHARA JUN
分类号 G01R31/26;G01R31/28;(IPC1-7):G01R31/26 主分类号 G01R31/26
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