发明名称 Video signal processor
摘要 An AGC circuit (70) amplifies a video signal according to again value output from again setting circuit (56). A clamp circuit (72) performs clamping of the direct current level of an output signal from the AGC circuit (70) at a clamp ability level according to a time constant set by a clamp time constant setting circuit (58). The clamp time constant setting circuit (58) receives input of the gain value generated by the gain setting circuit (56). A comparator circuit (120) compares the received gain value to a reference value, and, when the gain value exceeds the reference value, outputs a relatively large time constant. The clamp ability level of the clamp circuit (72) is controlled according to this time constant. In this manner, when the gain value is large, gradual clamping can be executed so as to minimize the influence of noise components superimposed on the direct current level, thereby suppressing transverse noise.
申请公布号 US2004090558(A1) 申请公布日期 2004.05.13
申请号 US20030648043 申请日期 2003.08.26
申请人 SANYO ELECTRIC CO., LTD. 发明人 TAKAHASHI TATSUYA;WATANABE TOHRU;TABATA OSAMU
分类号 H04N5/18;(IPC1-7):H04N5/18 主分类号 H04N5/18
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