IMPEDANCE CALIBRATION CIRCUIT

摘要

An impedance calibration circuit for a serial ATA (SATA) transmitter has a resistor in series with each leg of the differential output of the transmitter. An array of selectable resistors is in parallel with each of the series resistors. Resistors in the array are selected to be in parallel with the series resistors. A calibration circuit utilizes a comparator to determine when the minimum error in the impedance calibration is reached. Offset errors in the comparator are compensated for by a circuit which determines the center of alternate ones and zeros generated by the comparator when the input signals are within the offset of the comparator, which should be the point of minimum error in the calibration.