| 摘要 |
PURPOSE: A method for forming a dual damascene pattern of a semiconductor device is provided to improve reliability by guaranteeing a sufficient process margin while maintaining a contact area as it is, and to improve an electrical characteristic by controlling a leakage current and a defective metal electro-migration. CONSTITUTION: An interlayer dielectric is formed on a semiconductor substrate in which various elements including a semiconductor device are formed. A plurality of via holes(107) of a predetermined pattern are formed on the interlayer dielectric. A trench(108) that overlaps the via hole and has a small width in its portion adjacent to a peripheral via hole(107a) is formed in the interlayer dielectric.
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