| 摘要 |
PURPOSE: An output buffer circuit is provided to maintain a duty ratio of a predetermined signal and change a present potential level to a potential level requested from the outside by improving a structure of the output buffer circuit. CONSTITUTION: An output buffer circuit includes a plurality of inverters(INV21-INV30), a plurality of transmission gates(TG21,TG22), a first and a second level shifter(200,210), a first and a second pulse signal generator(220,230), and an output signal generator(240). The inverters(INV21-INV30) are used for inverting and delaying an input signal. The transmission gates(TG21,TG22) are used for delaying and transmitting the input signal at the same time as the inverters. The first and the second level shifters(200,210) are used for elevating the potential levels of the output signals of the inverters and the transmission gates to the potential level of the power terminal. The first and the second pulse signal generators(220,230) are used for generating pulse signals according to the output signals of the first and the second pulse signals. The output signal generator(240) is used for delaying the output signals of the first and the second pulse signal generators and generating an output signal to change a high potential level and a low potential level according to the pulse signals of the first and the second pulse signal generators.
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