发明名称 (Design rule check)/(electrical rule check) algorithms using a system resolution
摘要 Method and apparatus for checking integrated circuit designs. In particular, one embodiment of the present invention is a method that for checking integrated circuit design files using (design rule check)/(electrical rule check) files (DRC/ERC files) wherein design objects are disposed on a grid having a system resolution, the method comprising steps of: (a) growing one or more rectangular boxes having at least two sides of length equal to the system resolution outward or inward from one or more of an edge of a design object and a side of a design object; (b) performing one or more of a spacing DRC/ERC check and an overlay DRC/ERC check; and (c) identifying checks relating to the rectangular boxes.
申请公布号 US6735749(B2) 申请公布日期 2004.05.11
申请号 US20020103521 申请日期 2002.03.21
申请人 SUN MICROSYSTEMS, INC. 发明人 LI MU-JING;YANG AMY
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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