发明名称 Semiconductor memory
摘要 A plurality of memory blocks including a plurality of memory regions as minimum erase units is formed. When an erase control signal supplied in response to an erase command indicates a first erase mode, an erase selecting circuit selects all of the memory regions in the memory block selected by a first address signal. An erase control circuit erases data of the memory regions selected by the erase selecting circuit. Namely, erasure of the data is carried out by the memory block when the erase control signal indicates the first erase mode. Since the memory regions from which the data are erased can be selected simultaneously by one erase command, it is possible to reduce the number of input of erase commands. Therefore, it is possible to simplify a system program to be carried out by a CPU or the like which controls a semiconductor memory.
申请公布号 US6735126(B1) 申请公布日期 2004.05.11
申请号 US20020155997 申请日期 2002.05.29
申请人 FUJITSU LIMITED 发明人 NAKAGAWA HARUNOBU
分类号 G11C16/02;G11C16/16;(IPC1-7):G11C16/04 主分类号 G11C16/02
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