发明名称 Apparatus and method for processing interleaving/deinterleaving with address generator and channel encoding system using the same
摘要 An interleaving/deinterleaving processing method, a channel encoding system using it and a computer readable recording media for realizing it is provided. The interleaver includes: an interleaving storing unit for storing data sequence; the writing address generating unit for obtaining inter-location offset of a memory on which symbols are to be written in order to perform a writing operation and for generating a writing address to be practically written on, data and a memory control signal; an address offset generating unit for receiving a middle value (MID_OFF) and a start signal from the writing address generating unit, the middle value and the start signal being used for obtaining an offset between an inter-location offset of the memory; a reading address generating unit for generating increasing the address offset generating unit originated signal to as much as a symbol's memory inter-location offset; the first and the second selecting unit for selecting appropriate signal between a control signal and address in the writing address generating unit and the reading address generating unit transferred writing operation needed reading operation, and in a real interleaving operation needed reading operation; and a third selecting unit for selecting appropriate symbol in the memory output signals and performed from the reading address generating unit transferred interleaving.
申请公布号 US6735723(B2) 申请公布日期 2004.05.11
申请号 US20000750186 申请日期 2000.12.29
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 PARK HYUNG-IL;EO IK-SOO;KIM KYUNG-SOO
分类号 G06F11/10;H03M13/27;H04B14/04;H04J13/00;(IPC1-7):G06F11/00 主分类号 G06F11/10
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