| 摘要 |
A nonvolatile semiconductor vertical channel semiconductor device and a method of fabricating the same. The method starts with forming an insulator for device isolating having a depth D in a semiconductor substrate. The semiconductor substrate is etched with an etch depth d so that elevated portions are formed. A first conductive film is formed covering the elevated portions. After selectively and isotropically etched, the first conductive film is anisotropically etched so as to form floating gates on the side surfaces of the elevated portions. Sequently, a device insulating may be performed by selective oxidation technology. Further, a second conductive film is formed and anisotropically etched so that control gates are fabricated on the side surfaces of the elevated portions. In this case, forming a mask on predetermined regions of the elevated portions, the second conductive film may be etched to form gates of planar transistors or wirings. Then, a nonvolatile memory device is completed. If the depth D of the insulator and the etch depth d satisfy the following equation: D>d, a NAND circuit can be fabricated. Furthermore, a NAND circuit comprising planar MOS transistors for selective transistors and vertical channel transistors for memory cells may be manufactured.
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