发明名称 |
Fast controlled output buffer |
摘要 |
An output buffer switch-on control circuit includes several transistors and a discharge current control circuit. A first transistor has a first terminal connected to an internal voltage line and is controlled by an output data source. A second transistor has a first terminal connected to the internal voltage line and is controlled by a second terminal of the first transistor. The second transistor also has a second terminal connected to a first terminal of an output capacitor. A third transistor is controlled by the output data source and has a first terminal connected to a common voltage. A fourth transistor is digitally controlled and has a first terminal connected to the second terminal of the second transistor. The fourth transistor also has a second terminal connected to the common voltage. The discharge current control circuit is preferably actively-controlled and is connected between a second terminal of the first transistor and a second terminal of the third transistor. The discharge current control circuit preferably includes a discharge resistor and a mirrored current transistor feedback controlled by an output capacitor.
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申请公布号 |
US6734701(B2) |
申请公布日期 |
2004.05.11 |
申请号 |
US20020323614 |
申请日期 |
2002.12.18 |
申请人 |
ATMEL CORPORATION |
发明人 |
BEDARIDA LORENZO;SIVERO STEFANO;MANFRE DAVIDE |
分类号 |
H03K17/16;H03K19/003;(IPC1-7):H03K17/16;H03K19/094 |
主分类号 |
H03K17/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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