发明名称 |
Memory integrated circuitry with DRAMs using LOCOS isolations and areas less than 6F2 |
摘要 |
Memory integrated circuitry includes an array of memory cells formed over a semiconductive substrate and occupying area thereover, at least some memory cells of the array being formed in lines of active area formed within the semiconductive substrate which are continuous between adjacent memory cells. Adjacent memory cells are isolated from one another relative to the continuous active area formed therebetween by a conductive line formed over said continuous active area between said adjacent memory cells. At least some adjacent lines of continuous active area within the array are isolated from one another by LOCOS field oxide formed therebetween. The respective area consumed by individual memory cells is less than 8F<2>, where "F" is no greater than 0.25 micron.
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申请公布号 |
US6734487(B2) |
申请公布日期 |
2004.05.11 |
申请号 |
US20010930787 |
申请日期 |
2001.08.14 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
TRAN LUAN;REINBERG ALAN R. |
分类号 |
H01L27/108;(IPC1-7):H01L27/108;H01L29/76;H01L29/94;H01L31/119 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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