A METHOD OF FORMING SHALLOW TRENCH ISOLATION STRUCTURE IN A SEMICONDUCTOR DEVICE

摘要

A method (Figs. 3A-3I) for fabricating a shallow trench isolation structure (Fig. 4) is described, in which a bottom pad oxide layer (62), a middle silicon nitride layer (64), a middle oxide layer (66) and a top silicon nitride layer (68) are sequentially formed on a silicon substrate (60). Phot o- lithographic masking and anisotropic etching are then conducted to form a trench (70) in the substrate. An oxide material (80) is then deposited on to p of the top silicon nitride layer, filling up the trenches at the same time (Fig. 3E). The top silicon nitride layer is then removed, followed by an isotropic etch of the oxide layer below. With the middle nitride layer actin g as a natural etch stop, the oxide material is sculpted to a desirable shape. The middle nitride layer and the pad oxide layer are subsequently removed to complete the fabrication of a shallow trench isolation structure.