METHOD FOR CONTROLLING DATA TRANSFER BETWEEN MEMORY OR PERIPHERALS AND DATA PROCESSOR, AND PERIPHERAL CIRCUIT, DATA PROCESSOR, AND DATA PROCESSING SYSTEM USED FOR THE SAME

摘要

PURPOSE: A method for controlling data transfer between a memory or peripherals and a data processor, and peripheral circuits, the data processor, and a data processing system used for the same are provided to execute the fast data process between data processors by fully utilizing original features of the peripheral circuits such as the memory. CONSTITUTION: A cycle timing generating circuit(1010) generates an access timing generating signal(1013) of an internal operation depending on an oscillation output signal of a self-oscillation circuit(102) by responding to an access request from the data processor. An external terminal(AC) outputs the access cycle signal to the outside as a responding request. An internal timing generating circuit(1011) generates an internal operation timing signal by synchronizing with the access cycle signal.