METHOD OF FORMING A NITRIDE GATE DIELECTRIC LAYER FOR ADVANCED CMOS DEVICES

摘要

A process for forming a dielectric stack for use as a gate dielectric layer for sub -0.1 um MOSFET devices has been developed. The process features growth of a thin silicon nitride layer on the surface of a semiconductor substrate via a low temperature plasma nitridization procedure. The conditions used allow a self-limiting silicon nitride layer, in regards to thickness, to be realized. A plasma oxidation procedure is next used to remove bulk traps in the silicon nitride layer in addition to forming a thin silicon oxide layer on the semiconductor surface, underlying the thin silicon nitride layer. The plasma oxidation procedure also results in conversion of a top portion of the silicon layer to silicon oxynitride, thus resulting in a dielectric gate stack comprised of silicon oxynitride-silicon oxide-silicon nitride.