发明名称 Method of manufacturing interconnection structure applied to semiconductor device
摘要 A barrier metal layer constituted of a TiN layer and a Ti layer is formed on a surface of an interlayer insulating film and on an inside surface of an interconnection recess formed in the interlayer insulating film while a substrate is maintained at a temperature of at least 200° C. and lower than 300° C. The interconnection recess is filled with a conductive layer and an extra part of the conductive layer that is deposited on the interlayer insulating film is removed through such a polishing process to form a conductive plug. In the process of forming the barrier metal layer, as the substrate is maintained at the temperature, the residual stress in the deposited barrier metal layer can be reduced. Accordingly, it is achieved to suppress peeling which occurs at the interface between the barrier metal layer and the interlayer insulating film in the polishing process.
申请公布号 US2004087137(A1) 申请公布日期 2004.05.06
申请号 US20030406184 申请日期 2003.04.04
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA;RYODEN SEMICONDUCTOR SYSTEM ENGINEERING CORPORATION 发明人 TAKEWAKA HIROKI;YAMASHITA TAKASHI;MASAMITSU TAKESHI
分类号 H01L21/28;H01L21/285;H01L21/3205;H01L21/768;H01L23/52;(IPC1-7):H01L21/476 主分类号 H01L21/28
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