AN INTERFACE LAMINA

摘要

An emission layer 3 of an FED device has emitters which are caused to emit electrons or not according to whether or not a voltage on a gate 12, that is to say on a gate line 20 and thus at a gate aperture 121 surrounding the point 13 of the emitter generates an electric field at the point which is sufficiently high for electrons to be emitted from the point. For the voltages of the emitters and the gates of the pixel are controlled. Emitter lines 18 are arranged at the front face 19 of the substrate 4 parallel to one edge of the display and gate lines 20 are arranged at the front face 21 of the emission layer 3, orthogonal to the emitter lines. The front face is covered by an interface lamina 1011 forming part of the emission layer 130. The lamina 101 is a single thickness of fired photo imageable glass.