发明名称 Mask, method of producing mask, and method of producing semiconductor device
摘要 To provide a mask able to prevent a drop in pattern position accuracy due to the influence of internal stress of a membrane and able to align patterns including complementary divided patterns precisely, a method of producing the same, and a method of producing a semiconductor device. A stencil mask having lattice-shaped struts formed by etching a silicon wafer on four regions of a membrane wherein the lattices are offset from each other in the four regions and all of the struts are connected to other struts or the silicon wafer around the membrane (frame), a method of producing a stencil mask, and a method of producing a semiconductor device.
申请公布号 US2004086790(A1) 申请公布日期 2004.05.06
申请号 US20030689098 申请日期 2003.10.21
申请人 MORIYA SHIGERU;OMORI SHINJI 发明人 MORIYA SHIGERU;OMORI SHINJI
分类号 G03F1/16;G03F1/20;G03F1/22;H01L21/027;H01L21/033;(IPC1-7):G03F9/00;G03C5/00 主分类号 G03F1/16
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