发明名称 Complementary transistors with controlled drain extension overlap
摘要 An integrated circuit device (60) including a first transistor (PMOS) of a first conductivity type and a second transistor (NMOS) of a second conductivity type that is complementary to the first conductivity type. The method includes the steps of forming a first gate stack (100), the first transistor including the first gate stack and forming a second gate stack (80), the second transistor including the second gate stack. The method further includes implanting a first drain extension region (107) at a first distance relative to the first gate stack, the first transistor including the first drain extension region, and the method includes implanting a second drain extension region (87) at a second distance relative to the second gate stack, the second transistor including the second drain extension region. The first distance is greater than the second distance.
申请公布号 US6730556(B2) 申请公布日期 2004.05.04
申请号 US20020313357 申请日期 2002.12.06
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 WU ZHIQIANG;HU CHE-JEN
分类号 H01L21/8238;(IPC1-7):H01L21/823;H01L21/336 主分类号 H01L21/8238
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