发明名称 |
Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures |
摘要 |
The invention encompasses stacked semiconductor devices including gate stacks, wordlines, PROMs, conductive interconnecting lines, and methods for forming such structures. The invention also includes a method of forming a transistor gate comprising: a) forming gate dielectric layer; b) forming a polysilicon gate layer against the gate dielectric layer; and c) doping the polysilicon gate layer with a conductivity-enhancing dopant, the dopant being provided in a concentration gradient within the polysilicon layer, the concentration gradient increasing in a direction toward the gate dielectric layer. The invention also includes a wordline comprising: a) a polysilicon line; a substantially fluorine impervious barrier layer over the polysilicon line; and a b) layer of metal-silicide over the substantially fluorine impervious barrier layer.
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申请公布号 |
US6730584(B2) |
申请公布日期 |
2004.05.04 |
申请号 |
US19990333770 |
申请日期 |
1999.06.15 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
SCHUEGRAF KLAUS FLORIAN;POWELL CARL;THAKUR RANDHIR P. S. |
分类号 |
H01L21/28;H01L29/49;(IPC1-7):H01L21/22;H01L21/44 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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