发明名称 INTEGRATED CIRCUIT TRANSISTOR WITH SEPARATE ANTI-PUNCHTHROUGH LAYER AND FORMING METHOD THEREOF
摘要 PURPOSE: An integrated circuit transistor with a separate anti-punchthrough layer is provided to control or reduce a punchthrough effect by intercepting or decreasing erosion of a depletion region formed in a source/drain region that confronts an opposite source/drain region of a MOS(metal oxide semiconductor) transistor. CONSTITUTION: A gate electrode(315) is formed on a semiconductor substrate(300). A source/drain region is formed in the semiconductor substrate, adjacent to the gate electrode. The anti-punchthrough layer is of a type that is separated from the semiconductor substrate, adjacent to the source/drain region.
申请公布号 KR20040037002(A) 申请公布日期 2004.05.04
申请号 KR20020065608 申请日期 2002.10.25
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK, BYEONG JUN
分类号 H01L21/334;(IPC1-7):H01L21/334 主分类号 H01L21/334
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