METHOD FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for forming an isolation layer of a semiconductor device is provided to prevent a facet phenomenon and facilitate a subsequent process by forming a predetermined thickness of a selective epitaxial silicon layer on the lower part of a trench and by planarizing the silicon layer by an annealing process using H2 gas. CONSTITUTION: An insulation layer pattern exposing an isolation region and a trench are formed on a silicon substrate(31). A thermal oxide layer(41) is formed on the surface of the trench. A nitride layer is formed on the resultant structure by a predetermined thickness. The nitride layer is blanket-etched to form a nitride layer spacer(44) on the sidewall of the insulation layer pattern and the trench. The thermal oxide layer is etched to expose the silicon substrate by using the insulation layer pattern and the nitride layer spacer as an etch mask. A predetermined thickness of a silicon layer is formed on the exposed silicon substrate by an SEG(selective epitaxial growth) method. The silicon layer is annealed and planarized. A buried insulation layer is formed on the resultant structure and is planarized to form an isolation layer(47).