| 摘要 |
Since A/D conversion circuits 30r, 30g and 30b to convert for output anal og R, G and B signals to digital signals, a phase adjustment circuit 31 to outp ut by delaying in the portion of 1 linc output signals of these A/D conversion circuits 30r, 30g and 30b, a first signal generation circuit 35 to generate Y signals from output signals of A/D conversion circuits 30r, 30g and 30b, a second Y signa l generation circuit 37 to generate a Y signal from an output signal of the phase adjustment circuit 31, a contour extracting circuit 39 to extract a vertical contour component and a horizontal contour component from Y signals generated by fir st and second Y signal generation circuits, and contour adders 34r, 34g and 34b to output signals contour-emphasized adding a vertical contour component and a horizontal contour component extracted by this contour extracting circuit 39 to output signals of the phase adjustment circuit are provided, and since it ha s been designed that the contour extracting 39 extracts a vertical contour componen t and a horizontal contour component from Y signals generated by first and second Y signal generation circuits 35 and 37 , provided the line memory necessary fo r the contour extracting circuit 39 is made as 1 piece, the power consumption can be made smaller, as well the costcan be loared.
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