| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which a copy time of data of twin cells in shifting to a partial mode is shortened and increment of an access time caused by refresh operation is suppressed and to provide its control method. SOLUTION: This device is provided with first and second word lines and first and second cells connected to intersection parts of first and second bit lines, in a normal mode, the first and the second word lines are made other address, in a partial (twin cell ) mode, the first and the second word lines are made the same address, one bit data is stored complementarily by the two cells, when it is set to the partial mode and data of the first cell is stored in the second cell, the second word line WL2 is activated during a pre-charge period of a pair of bit line based on a trigger signal generated by a refresh timer, successively, the first word line WL1 and a sense amplifier are activated based on a signal in which the trigger signal is delayed, and rewriting of first cell data for the first and the second cell is performed. COPYRIGHT: (C)2004,JPO
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