| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide an integrated circuit for using a high-frequency timing reference generator from a high-speed serial interface for providing clocking and timing conditions for the integrated circuit. <P>SOLUTION: In a timing mechanism, the need for a phase locked loop (PLL) macro cell for providing a timing reference and a timing signal in an IC is removed. The IC is suitably used as a disk drive integrated circuit including DSPs, memories, data path controllers, data interfaces, custom macro cells, and DSP peripherals. The high-speed serial interface is suitably a Serial ATA (SATA), a universal serial bus (USB), a fiber channel, or a Serial Attached SCSI (SAS). <P>COPYRIGHT: (C)2004,JPO</p> |
