| 摘要 |
PROBLEM TO BE SOLVED: To achieve a high speed reading function by changing in setting of an address scramble circuit of a fail memory for efficiently using a burst function of an SDRAM composing the fail memory. SOLUTION: The apparatus for reading fail memory data for storing fail memory data being a result of a device test into a memory array 2 by an address converted via an address scramble circuit 4 and reading to analyze the fail data stored at the time of background after completing the device test. At least one bit of an address selecting register included in the scramble circuit 4 is used for setting a straight mode, when the selecting register is set to the straight mode, the scramble circuit 4 is set so as to enable the address generated by a background address generating circuit 6 to be output as it is to the memory array 2 and the memory array 2 is accessed in a burst mode. COPYRIGHT: (C)2004,JPO
|
