发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device, i.e. an FET, in which the alignment accuracy of a mask is enhanced particularly in photolithography process. SOLUTION: The alignment accuracy of a mask is enhanced using an oxide film provided on a source-drain region when the mask of an FET is aligned. The basic performance of the FET is enhanced even if a gate width is shrunk and since a clearance between FETs can be reduced while shrinking the gate width with characteristics equivalent to conventional characteristics, a 5 GHz switch having enhanced isolation can be obtained. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004134588(A) 申请公布日期 2004.04.30
申请号 JP20020297747 申请日期 2002.10.10
申请人 SANYO ELECTRIC CO LTD 发明人 ASANO TETSUO;SAKAKIBARA MIKITO;NAKAJIMA YOSHIFUMI;ISHIHARA HIDETOSHI
分类号 H01L21/28;H01L21/338;H01L29/812;(IPC1-7):H01L21/338 主分类号 H01L21/28
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