发明名称 EEPROM AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide an EEPROM which is capable of making a memory transistor more uniform in characteristics and reducing its parasitic capacitance restraining a rewritable life and charge holding properties from deteriorating and to provide its manufacturing method. SOLUTION: The memory transistor is manufactured as follows: A floating gate electrode 8 is formed so as to cover the whole of a tunnel film 6 and a channel formation predetermined region 12 excluding a region located between the channel formation predetermined region 12 and a buried layer 3. A drain-side electric field relaxing layer 10 is formed in a self-aligned manner using the end face of the floating gate electrode 8. A control gate electrode 13 is formed on the floating gate 8 via an interlayer insulating film 11 so as to have such a shape wherein it is made, at least, larger in width than the floating gate electrode 8 on a region where the tunnel film 6 has been formed as it wraps up the floating gate electrode, but smaller in width than the floating gate electrode 8 on the channel formation predetermined region 12. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004134502(A) 申请公布日期 2004.04.30
申请号 JP20020296066 申请日期 2002.10.09
申请人 DENSO CORP 发明人 ITO HIROYASU;KATADA MITSUTAKA;MURAMOTO HIDETOSHI
分类号 H01L21/8247;H01L27/115;H01L29/423;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 H01L21/8247
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