发明名称 Efficient hardware a-buffer using three-dimensional allocation of fragment memory
摘要 A method and apparatus for arranging fragments in a graphics memory. Each pixel of a display has a corresponding list of fragments in the graphics memory. Each fragment describes a three-dimensional surface at a plurality of sample points associated with the pixel. A predetermined number of fragments are statically allocated to each pixel. Additional space for fragment data is dynamically allocated and deallocated. Each dynamically allocated unit of memory contains fragment data for a plurality of pixels. Fragment data are arranged to exploit modem DRAM capabilities by increasing locality of reference within a single DRAM page, by putting other fragments likely to be referenced soon in pages that belong to non-conflicting banks, and by maintaining bookkeeping structures that allow the relevant DRAM precharge and row activate operations to be scheduled far in advance of access to fragment data
申请公布号 US2004080512(A1) 申请公布日期 2004.04.29
申请号 US20020280721 申请日期 2002.10.24
申请人 MCCORMACK JOEL JAMES;JOUPPI NORMAN P.;SEILER LARRY DEAN 发明人 MCCORMACK JOEL JAMES;JOUPPI NORMAN P.;SEILER LARRY DEAN
分类号 G06F12/02;G06T1/60;G09G5/36;G09G5/39;(IPC1-7):G06F12/02 主分类号 G06F12/02
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