发明名称 |
Quad flat no-lead (QFN) grid array package, method of making and memory module and computer system including same |
摘要 |
A quad flat no-lead (QFN) grid array semiconductor package and method for making the same. The package includes a semiconductor die and a lead frame having a plurality of conductive elements patterned in a grid-type array. A plurality of bond pads on the semiconductor die is coupled to the plurality of conductive elements, such as by wire bonding. The semiconductor die and at least a portion of the lead frame are encapsulated in an insulative material, leaving the conductive elements exposed along a bottom major surface of the package for subsequent electrical connection with higher-level packaging. Individual conductive lead elements, as well as the grid array pattern, are formed by wire bonding multiple bond pads to a single lead at different locations and subsequently severing the leads between the bonding locations to form multiple conductive elements from each individual lead.
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申请公布号 |
US2004080030(A1) |
申请公布日期 |
2004.04.29 |
申请号 |
US20030728413 |
申请日期 |
2003.12.05 |
申请人 |
FEE SETHO SING;CHYE LIM THIAM |
发明人 |
FEE SETHO SING;CHYE LIM THIAM |
分类号 |
H01L21/48;H01L23/31;H01L23/495;(IPC1-7):H01L23/495 |
主分类号 |
H01L21/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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