| 摘要 |
PURPOSE: A method for forming a test pattern of a semiconductor device is provided to be capable of inspecting the bridge of the second landing plug without an additional pad composing method. CONSTITUTION: A gate electrode(13) is formed on a semiconductor substrate. The first landing plug contact isolating layer(15) and the first landing plug conductive layer are sequentially formed on the resultant structure. A planarization is performed on the resultant structure for isolating the first landing plugs(17a,17b). A bit line is formed on the resultant structure for contacting the first landing plug for the bit line. An interlayer dielectric is formed on the entire surface of the resultant structure. The second landing plug region(35) is formed into a bridge type structure by selectively etching the resultant structure. The second landing plug region is then filled with the second landing plug conductive layer. The second landing plug is formed into a string type structure by polishing the second landing plug conductive layer for exposing the bit line.
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