发明名称 Power management for active loop, spatially-combined amplifiers
摘要 The present invention discloses a system for improving power management for a class of spatial power combiners, called active loop probes, or, active loops. One aspect of the invention includes the provision of a patterned conductor on the surface the semiconductor chip that opposes the surface upon which the active devices of the loop are disposed. This metal material can be used to both enhance heat removal from the chip and to provide a new and more efficient DC biasing path (with the use of vias) for the active components on the other (front) surface of the chip. Another aspect of the invention is the introduction of a dielectric superstrate that attaches to the front surface of the chip to provide an alternative or complementary heat removal and/or biasing structure to the conventional substrate that is typically attached to the back side of the chip. Various combinations of the above features are disclosed.
申请公布号 US2004080370(A1) 申请公布日期 2004.04.29
申请号 US20020283849 申请日期 2002.10.29
申请人 MARTIN SUZANNE C.;ROLLISON CHRISTOPHER J.;DECKMAN BLYTHE C.;ROSENBERG JAMES J. 发明人 MARTIN SUZANNE C.;ROLLISON CHRISTOPHER J.;DECKMAN BLYTHE C.;ROSENBERG JAMES J.
分类号 H03F3/60;(IPC1-7):H03F3/68 主分类号 H03F3/60
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