发明名称 Method of generating net-list for designing integrated circuit device
摘要 A method of generating a net-list for designing an integrated circuit device is provided, including generating a pin template file by laying out logic elements included in the integrated circuit device, generating a pin file by assigning a serial number to the logic elements and setting power names necessary for operating the logic elements, and generating a power inform template file by grouping an internal circuit of the integrated circuit device by a unit of power, generating a power inform file by combining the pin file with the power inform template file and arranging power information which is separately applied to each logic element, generating a final power inform file by assigning correct power names to power ports, to which power applied thereto is not defined, and completing a final net-list by combining core-related information of the integrated circuit device with the final power inform file.
申请公布号 US2004083441(A1) 申请公布日期 2004.04.29
申请号 US20030440678 申请日期 2003.05.19
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 GWEON YONG-HOON;LEE JIN-YONG;KIM YONG-KWAN;PARK HYUN-SIK;SONG HYE-KYONG
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
代理机构 代理人
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