发明名称 Expandable on-chip back propagation learning neural network with 4-neuron 16-synapse
摘要 A expandable neural network with on-chip back propagation learning is provided in the present invention. The expandable neural network comprises at least one neuron array containing a plurality of neurons, at least one synapse array containing a plurality of synapses, and an error generator array containing a plurality of error generator. An improved Gilbert multiplier is provided in each synapse where the output is a single-ended current. The synapse array receives a voltage input and generates a summed current output and a summed neuron error. The summed current output is sent to the input of the neuron array where the input current is transformed into a plurality of voltage output. These voltage output are sent to the error generator array for generating a weight error according to a control signal and a port signal.
申请公布号 US2004083193(A1) 申请公布日期 2004.04.29
申请号 US20020283478 申请日期 2002.10.29
申请人 SHI BINGXUE;LU CHUN;CHEN LU 发明人 SHI BINGXUE;LU CHUN;CHEN LU
分类号 G06N3/063;(IPC1-7):G06G7/00;G06E1/00;G06E3/00;G06F15/18;G06N3/04;G06N3/08 主分类号 G06N3/063
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