发明名称 |
Digital IF processor |
摘要 |
Apparatus for processing a signal of a predetermined intermediate frequency (IF) to generate in-phase (I) and quadrature (Q) components thereof comprises: an analog-to digital converter circuit for sampling and digitizing the IF signal to generate digitized data samples thereof at a sampling rate that produces consecutive digitized data samples that are separated in phase by a substantially fixed phase angle 2pi/n, where n is an integer greater than zero; first digital circuitry coupled to the analog-to digital converter circuit for demodulating the digitized data samples by multiplying every n consecutive digitized data samples with n respectively corresponding digital reference samples; and second digital circuitry coupled to the first digital circuitry for combining selected ones of the demodulated samples based on the substantially fixed phase angle to generate digital data samples of the I and Q components of the IF signal. The apparatus may include third digital circuitry coupled to the second circuitry for generating digital data samples of a log video component of the IF signal from the digital data samples of the I and Q components. The first, second and third digital circuitry may be programmed into a gate array integrated circuit.
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申请公布号 |
US6727842(B1) |
申请公布日期 |
2004.04.27 |
申请号 |
US20030386335 |
申请日期 |
2003.03.11 |
申请人 |
L-3 COMMUNICATIONS AVIONICS SYSTEM, INC. |
发明人 |
SCHLEDER WILLIAM EDWARD;FINK MICHAEL PATRICK;YU PHILLIP HOSEOG |
分类号 |
G01S7/288;G01S13/78;(IPC1-7):G01S13/00;G01S13/08 |
主分类号 |
G01S7/288 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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