| 摘要 |
In a frame buffer memory including a DRAM (11), an SRAM (12) functioning as a cache memory, and a comparison unit (17) comparing depth data stored in the SRAM (12) and depth data input from an external source and writing depth data input from the external source directly to the SRAM (12) when depth data input from the external source represents a shallower point on a screen, a maxZ detection circuit (27) detecting depth data representing a deepest point among depth data of eight pixels stored in each memory block (18) of SRAM (12) is provided. The detection circuit (27) does not compare depth data of each pixel as comparison unit (17) but detects depth data representing a deepest point among depth data of eight pixels, whereby a Z buffering process is sped up.
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