| 摘要 |
A high-voltage level shifting circuit with optimized response time, comprising: an inverter having an input and an output, the inverter being connected between a first voltage and a second voltage whose difference remains constant over time; a resistor, in which one terminal is connected to the first voltage and a second terminal is connected to the input of the inverter; a high-voltage transistor, which is connected between the second terminal of the resistor and a current source whose switching on and off determine the level shifting of a digital signal; and a clamp transistor, which is connected between the first voltage and a node that is common to the resistor and to the high-voltage transistor. The gate terminal of the clamp transistor is connected to the output of the inverter.
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