发明名称 |
System and method for clock adjustment by subsequently detecting a target bit of data stream, re-adjusting, and correcting clock based on difference in detected bit |
摘要 |
Adjusting a clock signal includes receiving a data stream, detecting a bit in the data stream using a first amount of data in the data stream, adjusting the clock signal based on the detected bit, detecting the bit in the data stream using a second amount of data in the data stream, the second amount of data comprising more data than the first amount of data, and correcting the clock signal if a result of initial detecting differs from a result of subsequent detecting.
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申请公布号 |
US6728894(B2) |
申请公布日期 |
2004.04.27 |
申请号 |
US20010785430 |
申请日期 |
2001.02.16 |
申请人 |
MAXTOR CORPORATION |
发明人 |
MCEWEN PETER;PATAPOUTIAN ARA;HAN KE;VEIGA EDUARDO;SONNTAG JEFFREY L. |
分类号 |
G11B20/14;H03L7/091;(IPC1-7):G06F11/00 |
主分类号 |
G11B20/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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