| 摘要 |
A control circuit of a power converter is provided which is capable of selecting an optimal mode for reducing the number of times of switchings. The control circuit includes a current instruction generator 801 for providi ng current instruction values IAU* - IAW* to a current loop which controls outp ut currents of the power converter 1, a current deviation vector detector for calculating current deviations .degree. iU - .DELTA. iW between the current instruction values and corresponding feedback values, respectively; a voltage detector 812 for calculating a voltage vector of three-phase voltage generators 5U - 5W, and a PWM pattern selector 811 for selecting a PWM pattern for the power converter 1. When the current deviation vector deviates from the allowable deviation range, the PWM pattern selector selects a switching mode for the power converter 1 from among switching modes limited by values of the current deviation vector and the voltage vector, and outputs t he PWM pattern.
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