发明名称
摘要 PROBLEM TO BE SOLVED: To reduce a vertical moire phenomenon on a display screen by executing an interruption processing in synchronization with a vertical synchronizing signal and generating vertical deflection control data where an offset quantity is added in accordance with a condition in the interruption processing. SOLUTION: A digital arithmetic processing part 1 is operated by a clock of a sufficiently high frequency with respect to the vertical synchronizing signal and receives the signal as an input. Whenever the rising edge of the vertical synchronizing signal is detected, the digital arithmetic processing part 1 executes a moire correcting interruption processing for changing an arithmetic initial value to be used at the time of calculating vertical deflection control data at every vertical synchronization period and calculates and generates the vertical deflection control data. Then, a D/A-converting part 2 digitally and analogically converts vertical deflection control data which is outputted from the digital arithmetic processing part 1 and outputs a vertical deflection control signal. A vertical deflection circuit 3 is driven by the vertical deflection control signal and a deflection current is supplied from the circuit 3 to a vertical deflection coil 4.
申请公布号 JP3523061(B2) 申请公布日期 2004.04.26
申请号 JP19980132296 申请日期 1998.05.14
申请人 发明人
分类号 H04N3/16;(IPC1-7):H04N3/16 主分类号 H04N3/16
代理机构 代理人
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