| 发明名称 |
SELECTIVE CONNECTION IN IC PACKAGING |
| 摘要 |
In an integrated circuit package employing solder bump technology, a metal layer placed on the surface of a substrate below an array of bonding pads is split and displaced from its axis at selected locations to preserve electrical continuity, but to also lower the height of an insulating solder mask layer at those locations. |
| 申请公布号 |
AU2003263368(A1) |
申请公布日期 |
2004.04.23 |
| 申请号 |
AU20030263368 |
申请日期 |
2003.09.15 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
STEPHEN, WESLEY MACQUARRIE;IRVING MEMIS |
| 分类号 |
H01L21/60;H01L23/13;H01L23/50;H05K1/02;H05K3/34 |
主分类号 |
H01L21/60 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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