发明名称 |
Method of decreasing instantaneous current without affecting timing |
摘要 |
A method of calculating skews for memory cells and flip-flops in a circuit design to reduce peak power includes receiving a circuit design containing memory cells and other clocked cells; constructing a first graph that includes a union of all inputs, vertices representative of the memory cells and the other clocked cells, a union of all outputs, and edges between the vertices each having a length equal to a delay between corresponding vertices minus a clock period; constructing a second graph having vertices representative of only the memory cells and corresponding edges such that the maximum length between any two corresponding vertices is less than zero; calculating a skew for each of the memory cells from the second graph; constructing a third graph from the first graph by merging the vertices of the memory cells into a single vertex; calculating a skew for each of the other clocked cells from the third graph; normalizing each skew calculated for the other clocked cells; recalculating the skew for each of the memory cells from the normalized skew calculated for the other clocked cells; and generating as output the recalculated skew for each of the memory cells.
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申请公布号 |
US2004076067(A1) |
申请公布日期 |
2004.04.22 |
申请号 |
US20020278150 |
申请日期 |
2002.10.21 |
申请人 |
ANDREEV ALEXANDER E.;SCEPANOVIC RANKO |
发明人 |
ANDREEV ALEXANDER E.;SCEPANOVIC RANKO |
分类号 |
G06F17/50;G11C8/02;(IPC1-7):G11C8/02 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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