发明名称 Chireix architecture using low impedance amplifiers
摘要 Circuits and methods for use in amplifying amplitude and phase modulated signals. A circuit uses a combiner with dual parallel signal amplifiers feeding it. The signal amplifiers have a low output impedance while the combiner does not provide any isolation between its inputs from the signal amplifiers. As in other Chireix architectures, the signals from the signal amplifiers are phase modulated prior to being fed to the combiner. The combiner then combines these two signals and, depending on how these two signals are combined, the resulting output of the combiner is amplitude modulated. The signal amplifiers may be Class D or Class F amplifiers to provide high efficiency amplification of the signals.
申请公布号 US2004075492(A1) 申请公布日期 2004.04.22
申请号 US20020272725 申请日期 2002.10.16
申请人 J.S. WIGHT, INC.;ICEFYRE SEMICONDUCTOR CORPORATION 发明人 WIGHT JAMES STUART
分类号 H03C1/50;(IPC1-7):H03F3/68 主分类号 H03C1/50
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