发明名称 GENERATOR POLYNOMIAL ARITHMETIC CIRCUIT
摘要 PROBLEM TO BE SOLVED: To realize a generator polynomial arithmetic circuit having a small area and a high data transmission capacity generating an error detection code in a non-split frame and a spit frame. SOLUTION: A circuit generating an error detection signal for the header in a frame and an error detection signal for the split frame header in a split frame, and a circuit generating an error detection signal for the data in a non-split frame and an error detection signal for the split data in the split frame are communalized. Furthermore, a circuit generating an error detection code for the header and data in a split original frame is also provided. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004128640(A) 申请公布日期 2004.04.22
申请号 JP20020286729 申请日期 2002.09.30
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ISHII TATSUJI
分类号 G06F11/10;H03M13/15;H04L1/00;(IPC1-7):H04L1/00 主分类号 G06F11/10
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