发明名称 Test bench generator for integrated circuits, particularly memories
摘要 A computer based test bench generator (1) for verifying integrated circuits specified by models in a Hardware Description Language includes a repository (10) storing a general set of self-checking tests applicable to the integrated circuits. A capability is provided for entering behavior data (21) of an integrated circuit model (20), and for entering configuration data (22) of the integrated circuit model. The generator automatically generates test benches (30) in said Hardware Description Language by making a selection and setup of suitable tests from the repository according to the specified integrated circuit model, configuration and behavior data.
申请公布号 US2004078178(A1) 申请公布日期 2004.04.22
申请号 US20030603055 申请日期 2003.06.24
申请人 BLASI GIANLUCA;TAYAL REENEE 发明人 BLASI GIANLUCA;TAYAL REENEE
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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