发明名称 Semiconductor memory device for enhancing bitline precharge time
摘要 A semiconductor memory device for enhancing bitline precharge time and method for accelerating precharge time in the device is provided which may reduce overall precharging time, in an effort to guarantee proper high speed operations in the semiconductor memory device. In the method, an equalization enable signal may be applied to an equalizer of the device to precharge a bitline pair connected a memory cell, isolation part and sense amplifier of the device. Isolation control signals, to be applied to one or more of the isolation parts, may be delayed by a given time, so that a time of applying the isolation control signals is after a time of applying the equalization enable signal to the equalizer.
申请公布号 US2004076070(A1) 申请公布日期 2004.04.22
申请号 US20030659249 申请日期 2003.09.11
申请人 KIM HYUNG-DONG;OH CHI-SUNG 发明人 KIM HYUNG-DONG;OH CHI-SUNG
分类号 G11C7/12;G11C8/02;G11C11/4094;(IPC1-7):G11C8/02 主分类号 G11C7/12
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