发明名称 CELL CIRCUIT FOR MULTIPORT MEMORY USING 3-WAY MULTIPLEXER
摘要 An improved cell circuit for data readout for use in a multiport memory is provided. The multiport memory stores write data signals. The cell circuit includes a plurality of multiplexers each coupled to a discharge device. Each of the multiplexers receives a subset of the write data signals and a plurality of read wordline signals and selects an output enable signal among the subset of the write data signals based on the read wordline signals. Each of the discharge devices are coupled to one of the multiplexers for receiving the output enable signal to generate a drive signal for driving one or more bitlines of the multiport memory.
申请公布号 US2004076064(A1) 申请公布日期 2004.04.22
申请号 US20020273590 申请日期 2002.10.17
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 DHONG SANG HOO;HOFSTEE HARM PETER;ONISHI SHOJI;TAKAHASHI OSAMU
分类号 G11C8/16;(IPC1-7):G11C8/00 主分类号 G11C8/16
代理机构 代理人
主权项
地址